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  mpq4420h - aec1 in dustrial grade, 2 a, 36v ,synchronous step - down converter with pg an d ext. sync without forced ccm mode , mpq4420a - aec1 with forced ccm mode mpq4420h rev. 1. 1 www.monolithicpower.com 1 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. description the mpq4420h is a high - frequency, synchronous, rectified, step - down, switch - mode converter with built - in power mosfets. it offers a very compact solution to achieve a 2 a continuous output current with excellent load and line regulation o ver a wide input supply range. the mpq4420h has synchronous mode operation for higher efficiency over the output current load range. current - mode operation provides fast transient response and eases loop stabilization. full protection features incl ude over - current protection and thermal shut down. the mpq4420h requires a minimal number of readily - available standard external components, and is available in a space - saving 8 - pin tsot23 package. features ? wide 4v to 3 6 v continuous operating in put range ? 90 m/ 55m low r ds(on) internal power mosfets ? high - efficiency synchronous mode operation ? default 4 10 k hz switching frequency ? synchronizes to a 200 k hz to 2 .2 mhz external clock ? high duty cycle for automotive cold - crank ? power - save mode ? internal soft - start ? power g ood ? ocp protection and hiccup ? thermal shutdown ? output adjustable from 0.8v ? available in an 8 - pin tsot - 23 package ? available in aec - q100 grade 1 applications ? automotive ? industrial control system ? distributed power systems all mps parts are lead - free and adher e to the rohs directive. for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. typical application
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 2 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. ordering informat ion part number* package top marking mpq4420hgj tsot23 - 8 see below mpq4420hgj - aec1 tsot23 - 8 * for tape & reel, add suffix ? z (e.g. mpq4420hgj ? z) top marking a lm : product code of m pq4420hgj ; y: y ear code; package reference tsot23 - 8
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 3 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. absolute maximum rat ings (1) v in ................................ ................ - 0.3v to 40v v sw ................................................ - 0.3v to 41v v bs ................................ ....................... v sw +6v all other pins ................................ - 0.3v to 6v (2) continuous power dissipation (t a = + 25 c) ( 3 ) tsot 23- 8 ................................................ 1.25w junction temperature .............................. 150 c lead temperature ................................... 260 c storage temperature ................. - 65 c to 150 c recommended operating conditions continuous supply voltage v in .......... 4v to 3 6 v output voltage v out ................... 0.8v to 0.9x v in operating junction temp . (t j ). - 40 c to +1 25 c thermal resistance ( 4 ) ja jc tsot 23- 8 ............................. 100 ..... 55 ... c/w notes: 1) absolute maximum ratings are rated under room temperature unless otherwise noted. exceeding these ratings may damage the device. 2) about the details of en pin ? s abs max rating, please refer to page 1 4 , enable/sync c ontr ol section . 3) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), t he junction - to - ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambien t temperature is calculated by p d (max) = (t j (max) - t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device fr om permanent damage. 4) measured on jesd51 - 7, 4 - layer pcb.
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 4 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. electrical character istics v in = 12v, t j = - 40 c to + 1 25 c, unless otherwise noted. typical values are at t j =+2 5 c . par ameter symbol condition min typ max units supply current (shutdown) i shdn v en = 0v 8 a supply current (quiescent) i q v en = 2v, v fb = 1v 0.5 0.7 ma hs switch - on resistance r on_hs v bst-sw =5v 90 155 m ls switch - on resistance r on_ls v cc =5v 55 105 m switch leakage i lkg _sw v en = 0v, v sw = 12v 1 a current limit i limit under 40% dut y cycle 3 4.2 5.5 a oscillator frequency f sw v fb = 750m v 320 410 500 k hz fold - back frequency f fb v fb <400mv 70 1 00 1 30 k hz maximum duty cycle d max v fb =7 5 0mv , 41 0khz 9 2 9 5 % minimum on time ( 5 ) t o n_ min 70 n s sync frequency range f sync 0.2 2 .4 mhz feedback voltage v fb t j =25 c 7 80 792 8 04 mv 7 76 8 08 feedback current i fb v fb =8 2 0mv 10 10 0 na en rising threshold v en rising 1. 15 1.4 1.6 5 v en falling threshold v en falling 1. 05 1.25 1.4 5 v en threshold hysteresis v en_ hys 150 mv en input current i en v en =2v 4 6 a v en =0 0 0.2 a vin under - voltage lockout threshold - rising inuv rising 3. 3 3. 5 3. 7 v vin under - voltage lockout threshold - falli ng inuv falling 3. 1 3. 3 3. 5 v vin under - voltage lockout threshold - hysteresis inuv hys 2 00 mv v cc regulator v cc i cc = 0 ma 4. 6 4.9 5. 2 v vcc load regulation i cc =5ma 1 .5 4 % soft - start period t ss v out from 10% to 90% 0. 55 1. 45 2.45 ms thermal shutdown ( 5 ) 150 1 7 0 c thermal hysteresis ( 5 ) 3 0 c pg rising threshold pg vth rising as percent age of v fb 86.5 90 93.5 % pg falling threshold pg vth falling as percentage of v fb 8 0 .5 84 87 .5 %
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 5 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. electrical character istics (continued) v in = 12v, t j = - 40 c to + 1 25 c, unless otherwise noted. typical values are at t j =+2 5 c . parameter symbol condition m in typ max units pg threshold hysteresis pg vth _hys as percentage of v fb 6 % pg rising delay pg td _rising 40 9 0 1 60 s pg falling delay pg td _falling 30 55 95 s pg sink current capability v pg sink 4ma 0.1 0. 3 v pg leakage current i lkg_pg 10 100 n a notes: 5) derived from bench characterization. not tested in production
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 6 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. pin functions package pin # name description 1 pg power good. the output of this pin is an open drain and goes high if the output voltage exceeds 90% of the nominal voltage. 2 in su pply voltage. the mpq4420h operates from a 4v to 3 6 v input rail. requires c1 to decouple the input rail. connect using a wide pcb trace. 3 sw switch output. connect using a wide pcb trace. 4 gnd system ground. this pin is the reference ground of the regulated output voltage, and pcb layout requires special care. for best results, connect to gnd with copper traces and vias. 5 bst bootstrap. requires a capacitor connected between sw and bs t pins to form a floating supply across the high - side switch driver. a 2 0 resistor placed between sw and bst cap is strongly recommended to reduce sw spike voltage. 6 en/sync enable/synchronize. en high to enable the mpq4420h . apply an external clock to the en pin to change the switching frequency. 7 vcc bias supply. decouple with 0.1 f - to - 0.22 f capacitor. select a capacitor that does not exceed 0.22 f . 8 fb feedback. connect to the tap of an external resistor divider from the output to gnd, to set the output voltage. the frequency fold - back comparator lowers the os cillator frequency when the fb voltage is below 66 0mv to prevent current limit runaway during a short - circuit fault condition .
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 7 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical characteristics
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 8 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical characteristics (continued)
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 9 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics v in = 12v, v out = 3.3v, l = 10h, r bst =20 , t a = +25c, unless otherwise noted.
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 10 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) v in = 12v, v out = 3.3v, l = 10h, r bst =20 , t a = +25c, unless otherwise noted.
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 11 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) v in = 12v, v out = 3.3v, l = 10h, r bst =20 , t a = +25c, unless otherwise noted.
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 12 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical performance characteristics (continued) v in = 12v, v out = 3.3v, l = 10h, r bst =20 , t a = +25c, unless otherwise noted.
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 13 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. block diagram figure 1 : functional block diagram
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 14 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. o peration the mpq4420h is a high - frequency, synchronous, rectified, step - down, switch - mode converter with built - in power mosfets. it offers a very compact solution to achieve 2 a continuous output current with excellent load and line regulation over a wide input supply range. the mpq4420h operates in a fixed - frequency, peak - current ? control mode to regulate the output voltage. an internal clock initiates a pwm cycle. the integrated high - side power mosfet turns on and remains on until its current reaches the value set by the comp voltage. when the power switch is off, it remains off until the next clock cycle starts. if the current in the power mosfet does not reach the current value set by comp within 9 5 % of one pwm period, the power mosfet will be forced to turn off. internal regulator the 5v internal regulator power most of the internal circuitries. this regulator takes the v in input and operates in the full v in range: when v in exceeds 5.0v, the output of the regulator is in full regulation; whe n v in falls below 5.0v, the output of the regulator decreases following the vin. a 0.1uf decoupling ceramic capacitor is needed at the pin. error amplifier the error amplifier compares the fb pin voltage against the internal 0.8v reference (ref) and output s a comp voltage ? this comp voltage controls the power mosfet current. the optimized internal compensation network minimizes the external component count and simplifies the control loop design. enable/sync c ontrol en/s ync is a digital control pin that turn s the regulator on and off: drive en high to turn on the regulator, drive it low to turn it off. an internal 500k ? resistor from en/ s ync to gnd allows en/ s ync to be floated to shut down the chip. the en pin is clamped internally using a 6. 5 v series zener d iode, as shown in figure 2 . connect the en input pin through a pullup resistor to any voltage connected to the v in pin ? the pullup resistor limits the en input current to less than 1 5 0 a. for example, w ith 12v connected to v in , r pullup (12v ? 6. 5 v) 1 5 0 a = 36.7 k? . connecting the en pin directly to a voltage source without any pullup resistor requires limiting voltage amplitude to 6v to prevent damage to the zener diode. figure 2 : 6.5v - type zener di ode connect an external clock with a range of 200khz to 2 .2 mhz 2ms after output voltage is set to synchronize the internal clock rising edge to the external clock rising edge. the pulse width of external clock signal should be less than 1.7s. under - voltag e lockout under - voltage lockout (uvlo) protects the chip from operating at an insufficient supply voltage. the mpq4420h uvlo comparator monitors the output voltage of the internal regulator, vcc. the uvlo rising threshold is about 3. 5 v while its fal ling threshold is 3. 3 v . internal soft - start the soft - start prevents the converter output voltage from overshooting during startup. when the chip starts, the internal circuitry generates a soft - start voltage (ss) that ramps up from 0v to 1.2v. when ss is lo wer than ref, ss overrides ref so the error amplifier uses ss as the reference. when ss exceeds ref, the error amplifier uses ref as the reference. the ss time is internally set to 1.5ms. over - current protection and hiccup the mpq4420h has cycle - by - cycle over current limit when the inductor current peak value exceeds the set current limit threshold. if the output voltage starts to drop until fb is below the under - voltage (uv) threshold ? typically 84 % below the reference ? the mpq4420h enters hicc up mode to periodically restart the part. this protection
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 15 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. mode is especially useful when the output is dead- shorted to ground. the average short - circuit current is greatly reduced to alleviate the thermal issue and to protect the regulator. the mpq4 420h exits the hiccup mode once the over - current condition is removed. thermal shutdown thermal shutdown prevents the chip from operating at exceedingly high temperatures. when the silicon die temperature exceeds 1 7 0 c, it shuts down the whole chip. when t he temperature drops below its lower threshold (typically 1 4 0 c) the chip is enabled again. floating driver and bootstrap charging an external bootstrap capacitor power the floating - power - mosfet driver. a dedicated internal regulator (see figure 3) charges and regulates the bootstrap capacitor voltage to ~5v. when the voltage between the bst and sw nodes drops below regulation, a pmos pass transistor connected from v in to bst turns on. the charging current path is from v in , bst and then to sw. the external circuit should provide enough voltage headroom to facilitate charging. as long as v in is significantly higher than sw, the bootstrap capacitor remains charged. when the hs - fet is on, v in v sw so the bootstrap capacitor cannot charge. when the ls - fet is on, v in ? v sw reaches its maximum for fast charging. when there is no inductor current, v sw =v out so the difference between v in and v out can charge the bootstrap capacitor. the floating driver has its own uvlo protection, with a rising threshold of 2.2v and hysteresis of 150mv. a 20? resistor placed between sw and bst cap is strongly recommended to reduce sw spike voltage. figure 3 : internal bootstrap charging circuit startup and shutdown if both v in and en exceed their appropriate thresholds, the chip starts: the reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. the regulator provides stable su pply for the remaining circuitries. three events can shut down the chip: en low, v in low, and thermal shutdown. in the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command. power good the mpq4420h has power good (pg) output. the pg pin is the open drain of a mosfet. it should be connect ed to vcc or some other voltage source through a resisto r (e.g. 100k?). in the presence of an input voltage, the mosfet turns on so that the pg pin is pulled to low before ss is ready. after v fb reaches 90%ref, the pg pin is pulled high after a delay , typically 9 0s. when v fb drops to 8 4 %ref, the pg pin is pulled low . a lso, pg is pulled low if thermal shutdown or en is pulled low.
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 16 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. application informat ion setting the output voltage the external resistor divider sets the output voltage (see typical application on page 1). the feedback resistor r1 also sets the feedback loop bandwidth with the internal compensation capacitor. choose r1 around 40 k . r2 is then given by: 1 0.792v v r1 r2 out ? = the t - type network ? as shown in figure 4 ? is highly recommended when v out is low. r2 r1 rt fb v out figure 4 : t - type networ k rt+r1 is used to set the loop bandwidth. basically, higher rt+r1, lower bandwidth. t o ensure the loop stability, it is strongly recommended to limit the bandwidth lower than 40khz based on the 410khz default fsw. table 1 lists the recommended t - type resistors value for common output voltages. table 1 : resistor selection for common output voltages v out (v) 5 n? 5 n? r t n? 3.3 41.2 (1%) 13 (1%) 51 (1%) 5 41.2 (1%) 7.68 (1%) 51 (1%) selecting the inductor use a1h - to - 10h inductor with a dc current rating of at least 25% percent higher than the maximum load current for most applications. for highest efficiency, an inductor with small dc resistance is recommended . for most designs, the inductance value can be derived from the following equation. out in out 1 in l osc v (v v ) l v if ? = ? where i l is the inductor ripple current. choose the inductor ripple current to be approximately 30% o f the maximum load current . the maximum inductor peak current is: 2 i i i l load ) max ( l ? + = use a larger inductor for improved efficiency under light - load conditions ? below 100ma. vin uvlo setting mpq4420h has internal fix under vol tage lock out (uvlo) threshold: rising threshold is 3.5 v while falling threshold is about 3. 3 v. for the application needs higher uvlo point, external resistor divider between en and in as shown in figure 4 can be used to get higher equivalent uvlo threshol d. vin en in r5 500k r6 figure 5 : adjustable uvlo using en divider t he uvlo threshold can be computed from below two equations: en_rising rising v 500k//r6 r5 (1 inuv + = ) en_falling falling v 500k//r6 r5 (1 inuv + = ) where v en_rising =1.4v, v en_falling =1.25v. w hen choose r5, make sure it is big enough to limit the current flows into en pin lower than 1 5 0 a .
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 17 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. selecting the input capacitor the input current to the step - down converter is discontinuous, therefore requires a capacitor is to supply the ac current to the step - down converter w hile maintaining the dc input voltage. use low esr capacitors for the best performance. use ceramic capacitors with x5r or x7r dielectrics for best results because of their low esr and small temperature coefficients. f or most application , a 22f ceramic c apacitor is sufficient to maintain the dc input voltage. a nd it is strongly recommended to use another lower value capacitor (e.g. 0.1 f) with small package size (0603) to absorb high frequency switching noise. m ake sure place the small size capacitor as c lose to in and gnd pins as possible (see pcb layout section). since c1 absorbs the input switching current, it requires an adequate ripple current rating. the rms current in the input capacitor can be estimated by: ? ? ? ? ? ? ? ? ? = in out in out load 1 c v v 1 v v i i the worse case co ndition occurs at v in = 2v out , where: 2 i i load 1 c = for simplification, choose an input capacitor with an rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum or ceramic. when using e lectrolytic or tantalum capacitors, add a small, high quality ceramic capacitor (e.g. 1f) placed as close to the ic as possible. when using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive v oltage ripple at input. the input voltage ripple caused by capacitance can be estimated by: load out out in in s in iv v v1 f c1 v v ?? ? = ? ?? ?? selecting the output capacitor the output capacitor (c2) maintains the dc output voltage. use ceramic, tantalum, or low - esr electrolytic cap acitors. for best results, use low esr capacitors to keep the output voltage ripple low. the output voltage ripple can be estimated by: out out out esr s 1 in s vv 1 v 1r f l v 8 f c2 ?? ?? ? = ? + ?? ?? ?? ?? where l 1 is the inductor value and r esr is the equivalent series resistance (esr) value of the o utput capacitor. for ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and the capacitance causes the majority of the output voltage ripple. for simplification, the output voltage ripple can be estimated by: out out out 2 in s1 vv v 1 v 8 f l c2 ?? = ? ?? ?? for tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated to: out out out esr in s1 vv v 1 r fl v ?? = ? ?? ?? the characteristics of the output capacitor also affec t the stability of the regulation system. the mpq4420h can be optimized for a wide range of capacitance and esr values.
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 18 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. bst resistor and external bst diode a 20ohm resistor in series with bst capacitor is recommended to reduce the sw spike voltag e. higher resistance is better for sw spike reduction, but will compromise the efficiency on the other hand . an external bst diode can enhance the efficiency of the regulator when the duty cycle is high (>65%). a power supply between 2.5v and 5v can be use d to power the external bootstrap diode and v cc or vout is the good choice of this power supply in the circuit as shown in figure 6 . c bst c out l 3 5 bst sw external bst diode 1n4148 vcc/v out vcc 7 v out r bst figure 6 : optional external bootstrap diode to enha nce efficiency the recommended external bst diode is in4 148, and the bst capacitor value is 0.1f to 1f. pc b layout pcb layout , especially the input capacitor and vcc capacitor placement , is very important to achieve stable operation . for the best results, follow these guidelines: 1 ) place the ceramic s input capacitor as close to in and gnd pins as possible, especially the small package size (0603) input bypass capacitor . keep the connection of input capacitor and in pin as short and wide as possible. 2 ) place the vcc capacitor to vcc pin and gnd pin as close as possibl e. make the trace length of vcc pin - vcc capacitor anode - vcc capacitor cathode - chip gnd pin as short as possible. 3 ) use large ground plane directly connect to gnd pin. add vias near the gnd pin if bottom layer is ground plane. 4) route sw, bst away from se nsitive analog areas such as fb. 5) place the t - type feedback resistor close to chip to ensure the trace which connects to fb pin as the short as possible. vin vout gnd gnd top layer gnd bottom layer figure 7 : recomm ended pcb layout
mpq4420h ? 36v, 2a synchronous step - down converter mpq4420h rev. 1. 1 www.monolithicpower.com 19 5/24/2016 mps proprietary information. patent protected . unauthorized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. typical application circuits mpq4420h bst sw fb en/sync in vin vout c4 100nf 22f c2a l1 10h r2 r1 41.2k 13k c1c 0.1f 3.3v/2a gnd 2 6 4 8 3 5 vcc pg c3 0.1f r3 51k 1 7 c1b 10f 10f c1a 1m r5 r4 20 22f c2b r6 100k figure 8: 3.3v output typical application circui t
mpq4420h ? 36v, 2a synchronous step - down converter notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will no t assume any legal responsibility for any said applications. mpq4420h rev. 1. 1 www.monolithicpower.com 20 5/24/2016 mps proprietary information. patent protected . unautho rized photocopy and duplication prohibited. ? 2016 mps. all rights reserved. package information tsot23 - 8


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